面向AI卷积神经网络(CNN)和循环神经网络(RNN)对卷积和蓄水池计算的算力需求，本报告提出研究基于波长路由器的新型光学卷积运算芯片，以及基于多波长多路径光学干涉结构的超大蓄水池计算芯片，构建由光源阵列、调制器阵列、探测器阵列与波长路由器等组成的光计算新架构，能够在光源阵列和调制器阵列上直接加载2个向量数据，一次性完成卷积运算，无需多次迭代或预处理，使得运算速度和效率大幅提高。攻克光源、探测器等有源器件的片上异质集成和高速并行输入/输出技术难题，实现128向量和128个输入/输出端口以上的大规模矩阵卷积运算和蓄水池运算。同时研究大规模高速率并行AD、DA电路设计、综合封装及协同控制技术，构建基于光学卷积及蓄水池计算芯片的数据智能搜索和查找等应用场景的演示系统，实现光学芯片深度学习示范应用。_x000D_项目截至目前完成了16×32、32×64 硅基波长路由器的设计,16路多波长激光器阵列制作和测试,16-32路高速调制器和探测器阵列设计，以及与波长路由器集成的32x64硅光卷积计算芯片设计；研制了32路输入输出星型耦合器及大色散阵列波导光栅，并设计了可重构多波长多路径干涉耦合器阵列以及小规模蓄水池芯片。整合了光学卷积运算和光学蓄水池运算的硅光芯片，完成了一个完整的32mm×24mm的reticle设计，以及一个InP单片集成的32×64卷积计算芯片的设计和制作。完成了异质集成耦合器的设计与制作，以及系统方案设计，搭建了初步的应用实验系统并进行了应用实验。In order to meet the computational power requirements of AI convolutional neural network(CNN)and recurrent neural network(RNN)for convolution and reservoir computing,this report proposes to study a novel optical convolution computing chip based on wavelength router,and a large-scale reservoir computing chip based on multi-wavelength and multi-path optical interference structure.The new architectures of optical convolution computing and optical reservoir computing are constructed based on a light source array,a modulator array,a detector array and a wavelength router.Two vector data can be loaded directly on the light source array and the modulator array to complete the convolution operation at once,without multiple iterations or preprocessing,thus greatly increasing the operation speed and efficiency.The technological challenges of heterogeneous integration of active devices and high-speed parallel input/output are to be overcome,and large-scale matrix convolution computing and reservoir computing with 128 vectors and 128 input/output ports will be implemented.At the same time,large-scale high-speed parallel AD and DA circuits will be designed,and the collaborative control technologies will be developed.A demonstration system based on optical convolution and reservoir computing chips will be built,and the deep learning applications will be demonstrated._x000D__x000D_In the first two years of project implementation,we have completed the design of 16×32 and 32×64 silicon based wavelength routers,and the fabrication and testing of 16-channel multi-wavelength laser array.The designs of 16-32 channel high-speed modulator and detector arrays,their integration with a 32×64 wavelength router,and the silicon photonic convolution and reservoir computing chips are also completed.An InP-based monolithically integrated 32×64 convolutional computing chip has been designed and fabricated.The design and fabrication of the integrated coupler are completed,as well as the system scheme design.The preliminary integrated system has been built and tested,and several application experiments have been conducted.

面向AI卷积神经网络(CNN)和循环神经网络(RNN)对卷积和蓄水池计算的算力需求，本报告提出研究基于波长路由器的新型光学卷积运算芯片，以及基于多波长多路径光学干涉结构的超大蓄水池计算芯片，构建由光源阵列、调制器阵列、探测器阵列与波长路由器等组成的光计算新架构，能够在光源阵列和调制器阵列上直接加载2个向量数据，一次性完成卷积运算，无需多次迭代或预处理，使得运算速度和效率大幅提高。攻克光源、探测器等有源器件的片上异质集成和高速并行输入/输出技术难题，实现128向量和128个输入/输出端口以上的大规模矩阵卷积运算和蓄水池运算。同时研究大规模高速率并行AD、DA电路设计、综合封装及协同控制技术，构建基于光学卷积及蓄水池计算芯片的数据智能搜索和查找等应用场景的演示系统，实现光学芯片深度学习示范应用。_x000D_项目在第一年度完成了16×32、32×64 硅基波长路由器的设计,16路多波长激光器阵列制作和测试,16-32路高速调制器和探测器阵列设计，以及与波长路由器集成的硅光卷积计算芯片设计；研制了32路输入输出星型耦合器及大色散阵列波导光栅，并在此基础上设计了可重构多波长多路径干涉耦合器阵列以及小规模蓄水池芯片；整合了光学卷积运算和光学蓄水池运算的硅光芯片，完成了一个完整的32mm×24mm的reticle设计。完成了异质集成耦合器的设计与制作，以及系统方案设计，初步搭建了集成系统。In order to meet the computational power requirements of AI convolutional neural network(CNN)and recurrent neural network(RNN)for convolution and reservoir computing,this report proposes to study a novel optical convolution computing chip based on wavelength router,and a large-scale reservoir computing chip based on multi-wavelength and multi-path optical interference structure.The new architectures of optical convolution computing and optical reservoir computing are constructed based on a light source array,a modulator array,a detector array and a wavelength router.Two vector data can be loaded directly on the light source array and the modulator array to complete the convolution operation at once,without multiple iterations or preprocessing,thus greatly increasing the operation speed and efficiency.The technological challenges of heterogeneous integration of active devices and high-speed parallel input/output are to be overcome,and large-scale matrix convolution computing and reservoir computing with 128 vectors and 128 input/output ports will be implemented.At the same time,large-scale high-speed parallel AD and DA circuits will be designed,and the collaborative control technologies will be developed.A demonstration system based on optical convolution and reservoir computing chips will be built,and the deep learning applications will be demonstrated._x000D__x000D_In the first year of project implementation,we have completed the design of 16×32 and 32×64 silicon based wavelength routers,and the fabrication and testing of 16-channel multi-wavelength laser array.The designs of 16-32 channel high-speed modulator and detector arrays,their integration with the wavelength router,and the silicon photonic convolution computing chip are also completed.A 32-channel input/output star coupler,a large dispersion arrayed waveguide grating,and a small-scale reservoir computing chip are developed.A 32mm×24mm reticle design is completed by assembling the optical convolution computing and optical reservoir computing chips.The design and fabrication of the integrated coupler are completed,as well as the system scheme design.The preliminary integrated system has been built and tested.

面向AI卷积神经网络(CNN)和循环神经网络(RNN)对卷积和蓄水池计算的算力需求，本报告提出研究基于波长路由器的新型光学卷积运算芯片，以及基于多波长多路径光学干涉结构的超大蓄水池计算芯片，构建由光源阵列、调制器阵列、探测器阵列与波长路由器等组成的光计算新架构，能够在光源阵列和调制器阵列上直接加载2个向量数据，一次性完成卷积运算，无需多次迭代或预处理，使得运算速度和效率大幅提高。攻克光源、探测器等有源器件的片上异质集成和高速并行输入/输出技术难题，实现128向量和128个输入/输出端口以上的大规模矩阵卷积运算和蓄水池运算。同时研究大规模高速率并行AD、DA电路设计、综合封装及协同控制技术，构建基于光学卷积及蓄水池计算芯片的数据智能搜索和查找等应用场景的演示系统，实现光学芯片深度学习示范应用。项目在第一年度完成了16×32、32×64 硅基波长路由器的设计,16路多波长激光器阵列制作和测试,16-32路高速调制器和探测器阵列设计，以及与波长路由器集成的硅光卷积计算芯片设计；研制了32路输入输出星型耦合器及大色散阵列波导光栅，并在此基础上设计了可重构多波长多路径干涉耦合器阵列以及小规模蓄水池芯片；整合了光学卷积运算和光学蓄水池运算的硅光芯片，完成了一个完整的32mm×24mm的reticle设计。完成了异质集成耦合器的设计与制作，以及系统方案设计，初步搭建了集成系统。项目第一年度共申请发明专利13项，包括7项中国发明专利,6项国际专利申请，其中一项中国发明专利已经获得授权。In order to meet the computational power requirements of AI convolutional neural network(CNN)and recurrent neural network(RNN)for convolution and reservoir computing,this report proposes to study a novel optical convolution computing chip based on wavelength router,and a large-scale reservoir computing chip based on multi-wavelength and multi-path optical interference structure.The new architectures of optical convolution computing and optical reservoir computing are constructed based on a light source array,a modulator array,a detector array and a wavelength router.Two vector data can be loaded directly on the light source array and the modulator array to complete the convolution operation at once,without multiple iterations or preprocessing,thus greatly increasing the operation speed and efficiency.The technological challenges of heterogeneous integration of active devices and high-speed parallel input/output are to be overcome,and large-scale matrix convolution computing and reservoir computing with 128 vectors and 128 input/output ports will be implemented.At the same time,large-scale high-speed parallel AD and DA circuits will be designed,and the collaborative control technologies will be developed.A demonstration system based on optical convolution and reservoir computing chips will be built,and the deep learning applications will be demonstrated.In the first year of project implementation,we have completed the design of 16×32 and 32×64 silicon based wavelength routers,and the fabrication and testing of 16-channel multi-wavelength laser array.The designs of 16-32 channel high-speed modulator and detector arrays,their integration with the wavelength router,and the silicon photonic convolution computing chip are also completed.A 32-channel input/output star coupler,a large dispersion arrayed waveguide grating,and a small-scale reservoir computing chip are developed.A 32mm×24mm reticle design is completed by assembling the optical convolution computing and optical reservoir computing chips.The design and fabrication of the integrated coupler are completed,as well as the system scheme design.The preliminary integrated system has been built and tested.In the first year of the project,13 invention patents were filed,including 7 Chinese invention patents and 6 international patent applications,with one of the Chinese patents granted.