Nonadiabatic holonomic quantum computation (NHQC) has been developed to shorten the construction times of geometric quantum gates. However, previous NHQC gates require the driving Hamiltonian to satisfy a set of rather restrictive conditions, reducing the robustness of the resulting geometric gates against control errors. Here we show that nonadiabatic geometric gates can be constructed in an extensible way, called NHQC+, for maintaining both flexibility and robustness against certain types of noises. Consequently, this approach makes it possible to incorporate most of the existing optimal control methods, such as dynamical decoupling, composite pulses, and a shortcut to adiabaticity, into the construction of single-looped geometric gates. Furthermore, this extensible approach of geometric quantum computation can be applied to various physical platforms such as superconducting qubits and nitrogen-vacancy centers. Specifically, we performed numerical simulation to show how the noise robustness in recent experimental implementations [Phys. Rev. Lett. 119, 140503 (2017); Nat. Photonics 11, 309 (2017)] can be significantly improved by our NHQC-.approach. These results cover a large class of new techniques combing the noise robustness of both geometric phase and optimal control theory.

Implementing arbitrary single-qubit gates with near perfect fidelity is among the most fundamental requirements in gate-based quantum information processing. In this work, we fabricate a transmon qubit with long coherence times and demonstrate single-qubit gates with the average gate error below 10−4, i.e. (7.42 ± 0.04) × 10−5 by randomized benchmarking (RB). To understand the error sources, we experimentally obtain an error budget, consisting of the decoherence errors lower bounded by (4.62 ± 0.04) × 10−5 and the leakage rate per gate of (1.16 ± 0.04) × 10−5. Moreover, we reconstruct the process matrices for the single-qubit gates by the gate set tomography (GST), with which we simulate RB sequences and obtain single-qubit fidelities consistent with experimental results. We also observe non-Markovian behavior in the experiment of long-sequence GST, which may provide guidance for further calibration. The demonstration extends the upper limit that the average fidelity of single-qubit gates can reach in a transmon-qubit system, and thus can be an essential step towards practical and reliable quantum computation in the near future. © 2023, The Author(s).

Here we report a breakthrough in the fabrication of a long lifetime transmon qubit. We use tantalum films as the base superconductor. By using a dry etching process, we obtained transmon qubits with a best T-1 lifetime of 503 mu s. As a comparison, we also fabricated transmon qubits with other popular materials, including niobium and aluminum, under the same design and fabrication processes. After characterizing their coherence properties, we found that qubits prepared with tantalum films have the best performance. Since the dry etching process is stable and highly anisotropic, it is much more suitable for fabricating complex scalable quantum circuits, when compared to wet etching. As a result, the current breakthrough indicates that the dry etching process of tantalum film is a promising approach to fabricate medium- or large-scale superconducting quantum circuits with a much longer lifetime, meeting the requirements for building practical quantum computers.

Here we report a breakthrough in the fabrication of a long lifetime transmon qubit. We use tantalum films as the base superconductor. By using a dry etching process, we obtained transmon qubits with a best T1 lifetime of 503 μs. As a comparison, we also fabricated transmon qubits with other popular materials, including niobium and aluminum, under the same design and fabrication processes. After characterizing their coherence properties, we found that qubits prepared with tantalum films have the best performance. Since the dry etching process is stable and highly anisotropic, it is much more suitable for fabricating complex scalable quantum circuits, when compared to wet etching. As a result, the current breakthrough indicates that the dry etching process of tantalum film is a promising approach to fabricate medium- or large-scale superconducting quantum circuits with a much longer lifetime, meeting the requirements for building practical quantum computers. © 2022, The Author(s).

Existing and near-term quantum computers can only perform two-qubit gating operations between physically connected qubits. Research has been done on compilers to rewrite quantum programs to match hardware constraints. However, the quantum processor architecture, in particular the qubit connectivity and topology, still lacks enough discussion, while it potentially has a huge impact on the performance of the quantum algorithms. We perform a quantitative and comprehensive study on the quantum processor performance under different qubit connectivity and topology. We select ten representative design models with different connectivities and topologies from quantum architecture design space and benchmark their performance by running a set of standard quantum algorithms. It is shown that a high-performance architecture almost always comes with a design with large connectivity, while the topology shows a weak influence on the performance in our experiment. Different quantum algorithms show different dependence on quantum chip connectivity and topologies. This work provides quantum computing researchers with a systematic approach to evaluating their processor design. © 2022, The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature.

Maintaining or even improving gate performance with growing numbers of parallel controlled qubits is a vital requirement for fault-tolerant quantum computing. For superconducting quantum processors, though isolated one- or two-qubit gates have been demonstrated with high fidelity, implementing these gates in parallel commonly shows worse performance. Generally, this degradation is attributed to various crosstalks between qubits, such as quantum crosstalk due to residual inter-qubit coupling. An understanding of the exact nature of these crosstalks is critical to figuring out respective mitigation schemes and improved qubit architecture designs with low crosstalk. Here we give a theoretical analysis of quantum crosstalk impact on simultaneous gate operations in a qubit architecture, where fixed-frequency transmon qubits are coupled via a tunable bus, and sub-100-ns controlled-Z (cz) gates can be realized by applying a baseband flux pulse on the bus. Our analysis shows that for microwave-driven single-qubit gates, the dressing from the qubit-qubit coupling can cause non-negligible cross-driving errors when qubits operate near frequency collision regions. During cz gate operations, although unwanted nearest-neighbor interactions are nominally turned off, sub-MHz parasitic next-nearest-neighbor interactions involving spectator qubits can still exist, causing considerable leakage or control error when one operates qubit systems around these parasitic resonance points. To ensure high-fidelity simultaneous operations, a request could be raised to figure out a better way to balance the gate error from target qubit systems themselves and the error from nonparticipating spectator qubits. Overall, our analysis suggests that towards useful quantum processors, the qubit architecture should be examined carefully in the context of high-fidelity simultaneous gate operations in a scalable qubit lattice. © 2022 authors. Published by the American Physical Society.

Existing and near-term quantum computers can only perform two-qubit gating operations between physically connected qubits. Research has been done on compilers to rewrite quantum programs to match hardware constraints. However, the quantum processor architecture, in particular the qubit connectivity and topology, still lacks enough discussion, while it potentially has a huge impact on the performance of the quantum algorithms. We perform a quantitative and comprehensive study on the quantum processor performance under different qubit connectivity and topology. We select ten representative design models with different connectivities and topologies from quantum architecture design space and benchmark their performance by running a set of standard quantum algorithms. It is shown that a high-performance architecture almost always comes with a design with large connectivity, while the topology shows a weak influence on the performance in our experiment. Different quantum algorithms show different dependence on quantum chip connectivity and topologies. This work provides quantum computing researchers with a systematic approach to evaluating their processor design.